SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
A prescribed region of a polyacetylene film that is provided on the flattened surface of a first interlayer insulating film is doped so as to form an upper wiring layer on the polyacetylene film. A second interlayer insulating film which covers this polyacetylene film has a flattened surface which i...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | A prescribed region of a polyacetylene film that is provided on the flattened surface of a first interlayer insulating film is doped so as to form an upper wiring layer on the polyacetylene film. A second interlayer insulating film which covers this polyacetylene film has a flattened surface which is formed by lamination of a polyimide film onto a silicon oxide film. A via hole is filled with a contact plug that is formed by a conductive polyacetylene film, and a prescribed region of a polyacetylene film that covers the second interlayer insulating film is doped to form an upper wiring layer of that polyacetylene film. |
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