FORMING METHOD FOR CONTACT HOLE OF DRAM

본 발명은 전하저장전극 콘택홀 형성 방법에 관한 것으로, 콘택홀 하부가 좁아지도록 식각 하거나, 라운드 지게 식각하여, 전하저장전극과 실리콘 기판 또는 P-웰 지역이 직접 콘택 되는 것을 제거함으로서 이로 인한 전하 손실 예방을 할 수 있으며, 결과적으로 리프레쉬 시간을 증가시킬 수 있는 효과가 있다. A semiconductor device includes: a field oxide layer formed on a semiconductor substrate; a transistor having an active region formed on a semiconductor substrate; an interlayer insulating layer formed on the transistor and the field oxide; and a tapered contact hole exposing the active region adjacent to the field oxide layer, wherein an upper portion of the tapered contact hole is wider than a lower portion thereof so that the field oxide is not etched during the contact hole etching process. A method for fabricating a semiconductor device includes the steps for: forming a field oxide layer on a semiconductor substrate; forming a transistor having an active region on a semiconductor substrate; forming an interlayer insulating layer on the resulting structure; and forming a tapered contact hole exposing the active region adjacent to the field oxide layer, wherein an upper portion of the tapered contact hole is wider than a lower portion thereof so that the field oxide is not etched during the contact hole etching process.