TRACE DEVICE FOR BUS INFORMATION

PURPOSE:To collect an operation hysteresis, which is generated in plural times, at a bus busy time on the plural number of trace memories and to easily investigate the causes of bus busy generation by providing the plural trace memories and a trace memory selecting means. CONSTITUTION:When a CPU 1, etc., executes a data transferring with a main storage device 2, etc., at first, a bus request signal is sent on a bus 5. In such a case, when a trouble is generated in the device of a transferring source and the bus request signal can not be fallen during an abnormally long period, a timer 17 in a trace device 10 of bus information executes an overflow and it is automatically reset. A bus busy detecting circuit 15 decides the generation of the bus busy and informs a memory control circuit 14. Then, the circuit 14 writes the flag of one bit, which shows the detection of the bus busy, into a trace memory 13-1 and the memory 13-1 is changed to a trace memory 13-2. In the same way, each time the bus busy is generated, the trace memory is continuously changed and the operation hysteresis at the bus busy time can be collected on the plural trace memories. Thus, the causes of the bus busy generation can be easily investigated.