FET SOURCE COUPLING LOGIC CIRCUIT
PURPOSE:To eliminate the need of a source follower part, and to realize the low power consumption by supplying a power source through a level shifting circuit to drains of a pair of differential FETs of the pre-stage, and lowering the output level of the pre-stage to the input level of a pair of dif...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | PURPOSE:To eliminate the need of a source follower part, and to realize the low power consumption by supplying a power source through a level shifting circuit to drains of a pair of differential FETs of the pre-stage, and lowering the output level of the pre-stage to the input level of a pair of differential FETs of the post-stage. CONSTITUTION:The number of diodes in diode series bodies D1n, D2n, a forward voltage of a L-piece portion of the diode, all of each resistance value, both of constant-current values of Q23, Q24, and outputs (drain voltages) of differential parts 2, 4 are denoted as n1, n2, and VDi, and RL, and IS, and V01, V02, respectively. Ranges of the drain potentials V01, V02 is shown by an expression I. In this regard, in order that Q41 and Q42 of the differential part 4 are always operated in a saturation area, it is necessary to satisfy the condition of an expression II. It is deformed as n1 |
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