MEMORY

PURPOSE: To attain efficiency in data processing by storing in a register the data that is written in a memory cell selected in arrays and writing the contents of the register or the data received by a data input device in response to a write mode signal. CONSTITUTION: A data register 8 stores the multi-data bit corresponding to the number of input in a storage device 1, and this data bit is supplied as input data in a following write cycle. A multiplexer 26 makes selections between the data supply to the data register 8 and the data supply to the data input. In addition, with a write mask register 54 arranged, writing in a memory array is inhibited for a few bits of the data register 8. The storage device 1 further contains a circuit for selectively inhibiting the use of a composite level in the final row; the contents of the data register 8 are written in a plurality of rows for each input/output; as a result, multiple bits are written in a single write cycle. Thus, data is outputted at high speed in a picture display device, with calling performance improved of the stored contents to a data processing device.