INFORMATION PROCESSOR

PURPOSE:To invalidate a buffer at high speed by rewriting the identifier register of a processor to a new identifier for every invalidating processing of an address converting buffer and converting the address thereafter by the use of the address converting buffer holding the new identifier. CONSTITUTION:At the time of making access to the address converting buffer of a virtual computer, the relevant entry of the buffer 2 is made access by the use of a part of the virtual address of a logical address register 3 to compare in a comparison circuit 5 whether the virtual address part (L) read therefrom coincides with the high order address part of the register 3 or not. In the identifier VMID in the buffer 2, an identifying information value at the time of registering an entry is stored to compare in a comparison circuit 4 whether the read identifier VMID coincides with a currently travelling identification number or not. Thereafter, when the two inputs of the circuits 4, 5 coincide, an output is fed to an AND gate 6 to establish an AND condition and output a real address for a real computer to the buffer 2.