SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

PURPOSE:To prevent inversion of a latch circuit by pulling out a precharged signal line through an output MOSFET, which receives the output signal of the latch circuit where stored information is held, and a transmission gate MOSFET. CONSTITUTION:The drain output of an output MOSFET Q3 is read out t...

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Bibliographische Detailangaben
Hauptverfasser: FURUKI HITOSHI, TACHIKAWA KATSUHISA
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To prevent inversion of a latch circuit by pulling out a precharged signal line through an output MOSFET, which receives the output signal of the latch circuit where stored information is held, and a transmission gate MOSFET. CONSTITUTION:The drain output of an output MOSFET Q3 is read out to a bus BA or BB through transmission gate MOSFETs Q4 and Q5 whose switching is controlled by select timing signals A and B respectively. For example, if a MOSFET Q1 of an inverter circuit is in the turn-on state and a MOSFET Q2 is in the turn-off state, the output MOSFET Q3 is turned on because the output signal is in the high level. Consequently, the signal line corresponding to the bus BA or BB is pulled out to the low level through this turned-on output MOSFET Q3 and the MOSFET Q4 or Q5 which is turned on in accordance with the high level of the signal A or B. Thus, erroneous inversion of the latch circuit is prevented.