DEBUGGING LOG RECORDING SYSTEM

PURPOSE:To facilitate debugging work by providing a debugging log storage memory which has an area corresponding to the address by which a processor accesses a storage device and writing access information in this memory in accordance with access to the storage device. CONSTITUTION:When a processor...

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1. Verfasser: ODAWARA KOICHI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To facilitate debugging work by providing a debugging log storage memory which has an area corresponding to the address by which a processor accesses a storage device and writing access information in this memory in accordance with access to the storage device. CONSTITUTION:When a processor 21 accesses a storage device 22, this access address is stored in a buffer register 12 through an address bus (a). The upper digit part of the access address is compared with the value preliminarily stored in an upper digit register 6 by a comparing part 7, and a coincidence detection signal is outputted from the comparing part 7 if they coincide with each other. The signal indicating the access state is sent from the processor 21 through an access signal line (d). A trace signal is sent from a trace register 9. A trace control part 10 writes access information in a debugging log storage part 42 when the coincidence detection signal, the access signal, and the trace signal are made active.