CONTROLLING SYSTEM FOR COMMON BUS

PURPOSE:To avoid occupation of a bus for a long period time by making a slave deliver a reprocessing request when a master having a low bus using priority gives an access to a slave having a low response speed. CONSTITUTION:It is supposed that masters B4 and A1 have high and low bus priorities respectively together with a slave A7 having a slow response to an external access. When the master A1 gives an access to the slave A7, an address data control part 2 puts on the address information 17 on an address bus 15. Then a bus control part 9 of the slave A7 puts an H signal on a reprocessing request signal line 13 to send it to the master A1. The master A1 releases the bus 15 and the slave A7 interrupts its processing. When the reprocessing is possible, the master A1 sends an H signal to a reprocessing signal line 14 to start processing again.