JPS6336069B

A process for manufacturing a dual spacing type magnetic bubble memory chip having a thin garnet film, on which a first area is provided with minor loop transmission lines for memorizing bubble information and a second area is provided with major transmission lines for recording or reading out the bubble information. The process comprises forming a first insulative layer (SiO2) on the garnet film over the first and second areas, forming conductive patterns on the SiO2 layer, coating the SiO2 layer and conductive patterns with a second insulative layer of resin (PLOS) and thermosetting the coated insulative layer, removing by etching part of the SiO2 and PLOS layers, which exist on the first area, forming a third insulative layer (SiO2) over the whole surface including the first and second areas, and forming the minor loop transmission lines and the major transmission lines on the third insulative layer.