SEMICONDUCTOR INTEGRATED CIRCUIT

PURPOSE:To shorten the effective wiring length of power supply wiring for narrowing the line width and attaining high integration by a method wherein, within multilayer power supply wirings, high voltage power supply wiring VDD and low voltage power supply wiring VSS running nearby in parallel with each other are closely laid out between different wiring layers. CONSTITUTION:Wirings 11 and 12 in the first layer are laid out respectively for VSS line and VDD line while wirings 31 and 32 are laid out mutually in parallel with and close to the wirings 11 and 12 in the first layer or to be substantially overlapped each other but line wirings in different voltages i.e., the wiring 31 and 32 are respectively allotted to the VDD line and the VSS line. Through these procedures, the wirings 32 as the VSS line is connected to a wiring 21 (VSS line) in the second layer by a contact V23-1 as well as to the wiring 11 by another contact V12-1 while the wiring 31 as the VDD line is connected to a wiring 22 in the second layer by a contact V23-2 as well as to the wiring 12 by another contact V12-2.