GAAS LOGIC INTEGRATED CIRCUIT

PURPOSE:To obtain large coupling capacitance under the state of sufficiently small ground floating capacitance, and to display the effect of the high-speed properties of an SLCF circuit enough while improving the degree of integration by forming a capacitor for coupling in the SLCF circuit onto a tr...

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Bibliographische Detailangaben
Hauptverfasser: IGAWA YASUO, TOYODA NOBUYUKI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To obtain large coupling capacitance under the state of sufficiently small ground floating capacitance, and to display the effect of the high-speed properties of an SLCF circuit enough while improving the degree of integration by forming a capacitor for coupling in the SLCF circuit onto a transistor region constituting a logic stage apart from a diode for level shift. CONSTITUTION:A driver transistor Q1 consisting of a normally ON-type GaAsFET and a load transistor, a diode D for level shift, a cathode 53 of which is connected to a gate 41 for the driver transistor Q1 and an anode 42 of which is connected at a signal input terminal, and a current source circuit Q3 for level shift connected to the gate 41 for the driver transistor Q1 are provided. A capacitor C in which a lower capacitor electrode 71, a capacitor insulating film 8 and an upper capacitor electrode 9 are laminated in the order is shaped onto the region of the driver transistor Q1 for such a GaAs logic integrated circuit through an insulating film 61, and the capacitor C is connected in parallel with the diode D for level shift. A schottky diode is used as said diode D for level shift.