MEMORY TESTING SYSTEM

PURPOSE:To discriminate a faulty section to be exchanged without increasing the testing cost, by not using a faulty memory for test, but using a content addressable memory of a relatively small capacity. CONSTITUTION:An input signal is added to a storage element 1 to be tested from a pattern generat...

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1. Verfasser: ISHIGURO HIDEO
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To discriminate a faulty section to be exchanged without increasing the testing cost, by not using a faulty memory for test, but using a content addressable memory of a relatively small capacity. CONSTITUTION:An input signal is added to a storage element 1 to be tested from a pattern generator 2. The output of the element 1 is compared with expected value data supplied from the generator 2 at a comparator 3. When the accessed address is discriminated as faulty as a result of the comparison at the comparator 3, the faulty address is processed by means of a content addressable memory (CAM) 4. At the CAM 4 the address when the fault occurs is used as input data and compared with already stored information. When coincidence is obtained as a result of the comparison, the address is ignored and, when no coincidence is detected, the address is stored in the CAM 4. The faulty address, the same address as which is removed at the CAM 4, is sent to a data processing section 5 where a process is carried out to exchange the faulty section by means of a standby storing section.