INSULATED-GATE SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF

PURPOSE: To improve the punch through resistance without increasing the channel resistance below a gate by a method wherein a low concentration layer in the conductivity type (similar to that of substrate) different from that of a drain is formed below the gate electrode on the drain side. CONSTITUTION: A substrate 1 is implanted with P(phosphorus) ion at 100 keV using an Mo gate 3 as a mask. At this time, the Pdose rate is e.g. around 1 X 10 cm within the range not to invert the substrate from p type to n type. Later, p ion is diffused in the substrate 1 by annealing process in the lateral direction at the 80 % of that in the depth direction (around 0.4 mum) to form a p-layer 4 creeping in below the Mo gate 3. Successively, the substrate 1 is ion-implanted with As(Arsenic) by around 6 X 10 cm. At this time, the substrate 1 is implanted with As ion almost straight forward without any dispersion to form n layers 5 as source.drain.