BASIC CELL OF GATE ARRAY

PURPOSE:To enhance an integration density without a diffusion process to compensate a discrepancy in opening a window of a contact hole by a method wherein a distance between an edge of a source/drain region and another edge, of a contact hole is made short in a wiring channel for base-body contact use while the distance is made long in other wiring channels. CONSTITUTION:In source/drain diffusion regions 7 which are adjacent to base-body contact regions 8 formed on the surface of an Si substrate 1, a distance on a plane between an edge on the side of the base-body contact regions 8 of contact holes 10 formed on an insulating film covering the surface of the source/drain diffusion regions 7 and another edge on the side of said base-body contact regions 8 of the source/drain diffusion regions 7 is formed to be shorter than in other wiring channels 11 in a wiring channel 11-B for base-body contact use whose wiring part is connected to the base-body contact regions 8. In a basic cell of a gate array, a position of the wiring channels for base-body contact use is limited in this way. By this setup, it is possible to obtain a big margin with reference to the contact holes 10 in regions on which a potential different from a basic potential is impressed; the contact holes 10 do not protrude from the S/D diffusion regions 7; it is possible to eliminate a diffusion process to compensate a discrepancy in opening a window of the contact holes.