PATH MEMORY CIRCUIT FOR VITERBI DECODER

PURPOSE:To reduce the number of gates, and to easily make a circuit into an integrated circuit by constituting a path memory cell of a selector and a latch circuit. CONSTITUTION:The memory cell 1 is constituted of the selector 2 and the latch circuit 3, and a clock signal lines 4-1-4-n (a figure shows the example of n=3) for operating the latch circuit 3 of the respective stage successively at a different phase are provided. Besides, the selector 2 of the path memory cell 1, located at a position, capable of dividing the inside of a block into equal number of stages is assumed to be the selector 3-1, and a control line 5 which makes the path memory cell 1, having the said selector 3-1, operate as a slave latch circuit, when the selector 3-1 is controlled so as not to execute a selecting operation by a path select signal is provided, and an optional block constitution is switched by the control from an external part. Thus, the number of the gates is decreased, and the circuit can be easily made into an integrated construction.