ERROR CORRECTION AND DETECTION SYSTEM

PURPOSE:To detect a (b)-bit block error and (b-1)-bit burst error by decoding information consisting of plural (b)-bit blocks according to a matrix including a partial parity matrix. CONSTITUTION:When data are written in a storage device 3, write data 10 supplied from a processor 1 is inputted to a check bit generator 3. The generator 2 generates a check bit 20 according to the matrix. This check bit is written in the storage device 3 together with the write data 10. When data is read out of the storage device 3, the read data 30 and check bit 31 are inputted to a syndrome generator 4. The generator 4 generates a syndrome 40 according to the parity matrix and supplies it to the decoder 5. The decoder 5 decodes the syndrome 40 and generates a one-bit correction signal 50.