CONSTITUTING METHOD FOR SCAN REGISTER
PURPOSE:To retry scan-out operation even if a fault occurs at the time of scan-out operation by multiplexing the output holding register of a logic circuit, and using only one register and preserving others at the time of scanning operation. CONSTITUTION:Respective bit outputs of the logic circuit 1...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | PURPOSE:To retry scan-out operation even if a fault occurs at the time of scan-out operation by multiplexing the output holding register of a logic circuit, and using only one register and preserving others at the time of scanning operation. CONSTITUTION:Respective bit outputs of the logic circuit 1 are supplied to latches 2-5 and latches 23-26 constituting registers 6 and 27 of a multiple register through 1st selecting circuits 7-10 respectively. The outputs of those latches 2-5 and 23-26 are supplied to latches 11-14 constituting a back-end register 18 through 2nd selecting circuits 19-22. The outputs of the latches 11-13 are supplied to the circuits 8-10, the input side of the circuit 7 is connected to an external terminal 15, and the output of the latch 14 is connected to an external terminal 16. The circuits 7-10 and circuits 19-22 select and output one of two inputs. Consequently, original data is saved in other registers of the multiple register, so even if a fault occurs in the scan-out operation, the scan-out operation can be retried. |
---|