LOAD DISTRIBUTION SYSTEM FOR PARALLEL INFERENCE COMPUTER

LOAD DISTRIBUTION SYSTEM FOR PARALLEL INFERENCE COMPUTER

PURPOSE:To ensure the uniform decentralization of load by distributing the goals where the contunuation of reductions are expected to the processor elements excluding the processor element that executed a reduction to produce a new goal. CONSTITUTION:A goal '?-ancestor (X, IEMITSU)' is red...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: YONEYAMA MITSUGI, SUGIE MAMORU
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:PURPOSE:To ensure the uniform decentralization of load by distributing the goals where the contunuation of reductions are expected to the processor elements excluding the processor element that executed a reduction to produce a new goal. CONSTITUTION:A goal '?-ancestor (X, IEMITSU)' is reduced with a processor element #0 for production of a new goal '?-parent (Z, IEMITSU) ancestors (X, Z)'. The goal '?-parent (X, IEMITSU)' and two goals produced from said goal are distributed to the element #0 and processed. While the other goal '?-parent (Z, IEMITSU), ancestors (X, Z)' which is produced from the initial goal is allocated to a processor element #n and processor there. In such a way, a goal is previously designated previously for estimation of the reduction continuation and another goal is produced from said goal. Thus it is possible to ensure the uniform decentralization of loads.