SEMICONDUCTOR MEMORY DEVICE

PURPOSE:To contrive the prevention of an influence of live capacity and malfunction by adding a capacitance nearly equal to a parasitic capacitance existing between 2nd and 3rd bit liens adjacent to each other in a semiconductor memory device having a sense amplifier between 1st and 3rd bit lines, between 1st and 4th bit lines, between 2nd and 4th bit lines. CONSTITUTION:A capacitor (C6, C7, C0) for correction is added respectively between the bit lines BA11 and BB21, between the bit lines BA12 and BB22, and between the bit lines BA11 and BB22. The capacitances of the capacitors C6, C7, C0 are nearly equal to the capacitance of the capacitance C1 between the bit lines BA12 and BA21. When all bit lines are precharged to an H level till times t1, t2, as soon as the level of the bit line BB21 is locked to an L level by the coupling capacitance C1 at a time t3, the level of the bit line B22 is pulled in an L level by the capacitor C7. Since the relation of the capacitance C1 C7 exists, the pulled-in level is nearly equal to both bit lines BB21, 22 and the levels of the bit lines BB21, 22 are not inverted. Thus, no malfunction takes place.