JPS6312392B

PURPOSE:To reduce a gate current and to enable the high speed operation of a compound semiconductor field effect transistor by interposing a GaAlAs layer having molar content of AlAs and high specific resistance between a gate electrode and the GaAlAs layer doped with an impurity. CONSTITUTION:A GaAlAs layer 8 having high specific resistance with non-dope is interposed between a gate electrode 7 and an n type GaAlAs layer 3. A current which flows through the gate is small when the current between the source and the drain is ON, and the resistance between the source and the gate at this time is higher than several 10kOMEGA, and the source and drain resistance is lower than 5kOMEGA. Accordingly, when the HEMT is applied to the logic circuit shown in the drawing, the current which flows through the Schottky junction of a switching transistor 11 can be reduced to sufficiently small value even if the voltage of the connecting point 15 is higher than the pinch-off voltage with the result that the power consumption can be reduced. Further, since the parasitic capacity between the source and the gate can be reduced as compared with the conventional HEMT, the interrupting frequency of the current can be enhanced, thereby enabling higher speed operation.