STACK CONTROL SYSTEM FOR PROCESSOR

PURPOSE:To prevent the generation of an abnormal operation or a runaway caused by the destruction of a data area other than a stack area or a program area by providing the titled system with a processor unit part and a stack unit part. CONSTITUTION:A stack area register part 111 in the stack unit pa...

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1. Verfasser: HORII NOBUO
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To prevent the generation of an abnormal operation or a runaway caused by the destruction of a data area other than a stack area or a program area by providing the titled system with a processor unit part and a stack unit part. CONSTITUTION:A stack area register part 111 in the stack unit part 11 stores an address in a stack area range set up by a microprocessor part 100 in the processor unit 10 and generates an interruption received by a maskable interruption control part 102. After receiving the interruption, stack operation is started and a stack area detecting part 112 compares a stack area access address based upon the stack operation with the range of a stack area in the register part 111 through a stack operation detecting part 110. At the time of accessing a stack area other than the range, a non-maskable interruption is instructed to the processor part 100 through a stack interruption part 113 or the like and the processor part 100 receiving the instruction displays a corresponding abnormal state and then processes restoring operation.