JPS6258586B

PURPOSE:To miniaturize a signal selecting circuit sufficiently and to reduce the production cost of the titled receiver by storing data previously in a storage circuit and reading out the data to select the receiving frequency. CONSTITUTION:Outputs set up by respective local setting switches S1, S2...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: YAMASHITA MASAMI, OOSHIMA JUICHI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PURPOSE:To miniaturize a signal selecting circuit sufficiently and to reduce the production cost of the titled receiver by storing data previously in a storage circuit and reading out the data to select the receiving frequency. CONSTITUTION:Outputs set up by respective local setting switches S1, S2 are code-converted by code converters 301, 302 and the code-converted outputs are sent to a random access memory (ROM) 501 in a data storage circuit 5. An output from a reversible counter 401 in a frequency selecting circuit 4 is also inputted to the ROM501. The ROM501 specifies the data corresponding to the digital outputs sent from the code converters 301, 302 and the counter 401 out of the many data stored in the ROM501. The specified data are latched by a latch circuit 503 and sent to a program counter 602 in a PLL circuit 6 and a switching circuit 210 in a receiving circuit 2. An oscillation frequency signal in the circuit 6 is sent to a mixer 212 and mixed with a high-frequency signal outputted from a high-frequency amplifier. If the SN of a received signal is deteriorated less than the prescribed value in the circuit 4, the value of the counter 401 is changed.