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PURPOSE:To execute the arithmetic with the excellent universal applicability by outputting a signal inputted to a basic arithmetic unit to a next arithmetic unit through a signal line and selecting and processing appropriately the arithmetic program of each basic arithmetic unit. CONSTITUTION:In the...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: YOSHII TORU, KANAMORI KYOZO, NONAKA MITSUYUKI, YAMAMOTO TAKASHI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To execute the arithmetic with the excellent universal applicability by outputting a signal inputted to a basic arithmetic unit to a next arithmetic unit through a signal line and selecting and processing appropriately the arithmetic program of each basic arithmetic unit. CONSTITUTION:In the basic arithmetic unit 6-a, the subtraction of the output of an A/D conversion unit 4 from the output (c) of the basic arithmetic unit 6-c is performed, and the arithmetic output is transmitted to the next-staged basic arithmetic unit 6-b, where the output of the previous unit 6-a is subjected to one-degree delay arithmetic, and its result is transmitted to the next unit 6-c. Like the previous unit, the integration arithmetic of the output of the unit 6-a is performed in the unit 6-c, and the result is transmitted to the subsequent D/A conversion unit 7 and the unit 6-a. In the unit 7, a digital input from the unit 6-c is converted into an analog signal 8, which is outputted.