JPS6245575B

PURPOSE:To prevent an unnecessary advance in program step and realize efficient interfacing without spoiling the compatibility of a control program by processing a stack status through an interface control circuit. CONSTITUTION:A host CPU1 is provided with a byte multiplexer 1-1 and a communication controller 2 connected to a communication circuit 3 is connected to the CPU1. This controller 2 is provided with an arithmetic part 2-1, circuit scanner 2-2, memory 2-3, and interface control circuit 2-4. Further, the control circuit 2-4 is provided with a status register 4-1 which transfers data to and from the channel 1-1, and with subchannel register 4-2, status memory 4-3, status transmission control circuit 4-4, status control latch group 4-5, etc. Then, the stack status is processed by the control circuit 2-4 to eliminate an unnecessary advance in program step, and to realize the efficient interfacing without spoiling the compatibility of the control program.