DATA PROCESSING SYSTEM

The invention relates to vector registers (VRs) which have associated therewith a vector status register (VSR) that includes VR status information in the form of vector in-use and change bits for saving and restoring (the contents of) the VRs. When the vector in-use bit for a VR is zero, the saving and subsequent restoring of the VR is eliminated because the VR is known to contain all zeros. This reduces program switching time. The vector change bit for a VR serves to reduce switching time still further by permitting the saving of a VR to be eliminated when its vector in-use bit is one but the vector change bit is zero. Although such a VR is in use, its content has not been changed since the last restore from the same save area in storage. The previously saved information is still valid. The vector change bits do not affect the restoring of vector registers and, therefore, do not reduce the restore time.