JPS6226728B
PURPOSE:To execute efficiently an instruction MOVE by comparing an amount of prefetch data which is determined by a specified amount of read alignment and the bus width of a memory with the contents of a length register, and allowing a microprogram to read the compared result. CONSTITUTION:A read al...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | PURPOSE:To execute efficiently an instruction MOVE by comparing an amount of prefetch data which is determined by a specified amount of read alignment and the bus width of a memory with the contents of a length register, and allowing a microprogram to read the compared result. CONSTITUTION:A read aligning circuit 2 aligns data read out of a main memory 1. Then the remaining amount of write data in the middle of the execution of a movement instruction is held in the length register 9, the address of the main memory when the movement instruction is executed is specified by an operand address register 7, and the write address of the main memory when the movement instruction is executed is specified by an operand address register 8. Further, the amount of prefetch data specified by the specified amount of the read alignment of a read alignment specifying circuit 11 and the bus width of the memory 1 is compared 13 with the contents of the register 9 and the compared result of the comparison circuit 13 is read by a microprogram. |
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