SEMICONDUCTOR DEVICE

PURPOSE:To facilitate power interconnection and enable a completely automatic layout, by disposing large-scale cells along four sides of a chip and disposing standard cells in row structure. CONSTITUTION:I/O cells 2 are disposed along the periphery of a chip. As to cells 3-6, the cell 3 is disposed on the upper left corner of the chip 1, and the cell 6 is disposed on the lower left corner, and the cell 4 is disposed adjacent to and to the right of the cell 3 and along the cells 2, and the cell 5 is disposed on the lower adjacent side of the cell 3 and along the cells 2. In the region except the one where the cells 3-6 and 2 are disposed on the chip 1, standard cells 7 are disposed in lines with respective different lengths in height directions. Such disposal facilitates power interconnection and enables a completely automatic layout.