SEMICONDUCTOR MEMORY DEVICE

PURPOSE:To prevent a processor whose exclusive right is not accepted from mistakenly writing data in a dual port RAM by providing the dual port RAM with the identification code display register of the processor that possesses said dual port RAM. CONSTITUTION:The dual port memory array DPM-ARY of the dual port RAM is divided into eight memory areas S0-S7, and a control circuit CTL is provided with corresponding eight-bit acquire registers QRa and QRb and a release register RR shared with two buses. Arbitration registers ARa and ARb are provided to display the identification code of the processor that has the exclusive right in each bus of the dual port RAM. Said registers are controlled by a register control circuit REGC.