CONTROL SYSTEM FOR INTER-PROCESSOR TRANSFER OF DATA

CONTROL SYSTEM FOR INTER-PROCESSOR TRANSFER OF DATA

PURPOSE:To attain the simple transfer of data by preparing both master and slave processors to secure the bidirectional transfer of data between both processors so that the data transfer request is controlled by the master processor. CONSTITUTION:Data are transferred between a master processor MP an...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: HAMAGUCHI KAZUHIKO
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:PURPOSE:To attain the simple transfer of data by preparing both master and slave processors to secure the bidirectional transfer of data between both processors so that the data transfer request is controlled by the master processor. CONSTITUTION:Data are transferred between a master processor MP and a slave processor SP. Then the master data transfer means 3-1-3-n and the slave data transfer means 6-1-6-n can transfer data in both directions via the data transfer paths SP-1-SP-n which are set statically. Furthermore a master control means 2 set at the MP side controls all data transfer requests given from both processors MP and SP.