DISPLAY CONTROL FOR DIGITAL COMPUTER

In a distributed computer system, each CPU (101) accesses memory via an intelligent memory control unit (401) connected by a memory bus (404) to a local memory (102) and video memory (113) and by an interface bus to other memory control units (401) In the system. A video control unit (406) relieves...

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Bibliographische Detailangaben
Hauptverfasser: MAIKERU POGIYUU, CHIYAARUZU SHII HAADO, DEEBITSUDO ERU RITSUCHI, UORUTAA EI OBURAIEN ZA SAADO
Format: Patent
Sprache:eng
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Zusammenfassung:In a distributed computer system, each CPU (101) accesses memory via an intelligent memory control unit (401) connected by a memory bus (404) to a local memory (102) and video memory (113) and by an interface bus to other memory control units (401) In the system. A video control unit (406) relieves the CPU (101) of much of the detailed work of modifying bit maps in the video memory (113). More specifically, in order to enhance the ability of the system to manage displays, especially in a technical graphics environment, where a single physical display supports a plurality of logical displays (windows), machine-language (graphics) instructions are provided which, in conjunction with logical display descriptors (forms) that describe each window, enable management and generation of display image data to be performed directly by the processing hardware of the digital computer system, minimizing the need for intervening software. Mechanisms are provided which gives the hardware the ability to defer complex protection and creation policies (faults) to operating system software. Data computed from the logical display descriptors may be encached, greatly enhancing the speed of consecutive operations on windows. Graceful creation is enhanced by permitting prosessing control to escape (trap) to software emulation handlers.