COUNTER

PURPOSE:To enable a counter to perform a down count when an electronic counter is loaded by providing a means which counts up when a mechanical counter responds and the first pulse having a time width possible to count up is impressed, and a means which counts down when the second pulse having a sho...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: TAKEMOTO TOSHIHARU, YAMAUCHI YASUSHI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To enable a counter to perform a down count when an electronic counter is loaded by providing a means which counts up when a mechanical counter responds and the first pulse having a time width possible to count up is impressed, and a means which counts down when the second pulse having a short time width is impressed. CONSTITUTION:A counting process is performed with the program process of a CPU1, and its control program is written in advance at a ROM2, and a RAM3 is a memory including a register which counts a count value. The CPU1 detects the change of a signal at a terminal P through an I/O4 and performs the count up or count down of the register. The CPU1 detects the signal level at the terminal P through the I/O4, and decides whether a time (t) is 'H' level exceeds a prescribed time T or not, and when it is yes, it performs the increment of a register C constituted in the RAM3. When a pulse width is shorter than the prescribed time T, it performs the decrement of the register C. Thus, the count up or the count down can be performed corresponding to the pulse width, and a result is displayed.