INPUT BUFFER CIRCUIT

PURPOSE:To reduce the delaying time at an input buffer circuit, by pulling up an output to a power source by utilizing an one-shot pulse which is produced when the input changes from a high level to a low level at the input buffer circuit. CONSTITUTION:When an input changes from a low level to a high level, an one-shot pulse N2 holds a high level, because the output of an input buffer 1 becomes a low level at a moment t1 before the moment when the output N1 of a delay circuit 33 becomes a high level. When the input changes from a high level to a low level, on the other hand, outputs of NAND circuits 34-37 quickly become low levels, because the output of the input buffer 1 changes from a low level to a high level at a moment t3 before the moment t4 when the output N1 of the delay circuit 33 changes from a high level to a low level. In other words, since the output is pulled up by conducting the QP 21 of a pull-up circuit 2 at the moment t3, high-speed pull-up is realized.