CHIP LAYOUT SYSTEM OF LSI

PURPOSE:To complete estimation of the chip and chip layout in a short time and to improve processing efficiency by determining automatically a block wiring position on the chip with an electronic computer and displaying a chip image of the result at the display. CONSTITUTION:To a computer 2 of a chi...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: MIURA CHIHEI, KUTSUWADA MAKOTO, TERAI SHUICHI
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:PURPOSE:To complete estimation of the chip and chip layout in a short time and to improve processing efficiency by determining automatically a block wiring position on the chip with an electronic computer and displaying a chip image of the result at the display. CONSTITUTION:To a computer 2 of a chip layout system, a pattern processing terminal 1 and a file device 3 are connected and conversation of the computer 2 and an operator can be executed. An operator's intention is inputted to a computer 2 from a keyboard device 12 of the processing terminal 1 and point coordinates, pattern data, are inputted from a pattern input device 13. A magnetic disk is used to the device 3, and a logical file which describes connection results between LSI blocks, a layout result of the block and a layout result of the block are stored and input output control is executed by the computer 2. By the computer 2, the block wiring position is automatically determined, the chip image of the result is displayed at a graphic display 11 and chip estimation or layout can be completed in a short time.