TIME DIVISION OCTETTE MULTIPLEX TYPE SIGNAL MULTIPLEXING SYSTEM

PURPOSE:To multiplex plural circuit control signals on one channel by using one bit C7 of a control signal bit having two bits in an octette to multiplex a circuit control signal and using the other one bit C0 as a mark signal for the multi-separation timing of the multiplexed circuit control signal. CONSTITUTION:Circuit control signals S1, S2 and Sn are repeatedly subjected to the time division multiplex in sequence at every octette in one frame, and a mark signal M is multiplexed at an octette period when the circuit control signal S1 is multiplexed. An envelope (separation) circuit 21 inputs an envelope (input) signal 211 from a time division exchange circuit 10, separates enveloped data signals D1-D6 of six bits and control signals C0 and C7 of two bits, outputs a circuit data (output) signal 210 from the D1-D6. Moreover said circuit 21 outputs a mark signal 411 from the C0 and a control signal multiplex signal 311 from the C7 to a mark signal (extraction) circuit 41 and a control signal (separation) circuit 31, respectively.