FRAME SYNCHRONIZING CONTROL SYSTEM

PURPOSE:To simplify and economize the constitution by detecting a frame synchronizing signal from n-set of low-order group signals from a selection circuit and taking frame synchronization in a high speed digital transmission. CONSTITUTION:One frame synchronizing signal is detected from n-set of par...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser:	NISHIZAKI KOUJI, GOTOU MASAYUKI
Format:	Patent
Sprache:	eng
Schlagworte:	ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY MULTIPLEX COMMUNICATION TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Beschreibung
Zusammenfassung:	PURPOSE:To simplify and economize the constitution by detecting a frame synchronizing signal from n-set of low-order group signals from a selection circuit and taking frame synchronization in a high speed digital transmission. CONSTITUTION:One frame synchronizing signal is detected from n-set of parallel low-order group signals from the selection circuit 11 and the shift control of a frame pulse is attained so that the frame synchronizing signal is detected in the timing of the frame pulse. When the frame synchronization is not taken even with the shift control of the frame pulse for frame's share, the selecting circuit 11 outputting selectively the n-set of parallel low-order group signals from (2n-1) parallel low order group signals is controlled so as to attain selecting changeover and the frame synchronizing is taken by repeating the shift control so that the frame synchronizing signal is detected in the timing of the frame pulse.