MEMORY CONTROL DEVICE

PURPOSE:To shorten a suppressing time by installing a circuit to prohibit new registration to a line designated by a cache memory, a circuit to sweep out data of a designated line and a memory access inhibit circuit from an input output control device. CONSTITUTION:A line designation new allocation prohibit bit 119 to prohibit that a line corresponding at the time of mishitting a cache memory 131 is a contrast to replacement, a sweeping-away control circuit 123 to sweep away cache memory data to a main memory device 201 of line unit by the request from a requesting party, and a sweeping-away row address counter 122 and an input output control device request reception inhibit bit 124 to inhibit a memory access to a memory control device 101 by an input output control device 401 when it is set are installed in the memory control device 101. Thus, a memory access suppressing time is shortened and a dynamic alteration processing of a system composition is improved.