CIPHERING DEVICE

PURPOSE:To reduce influences of error on a transmission line by using k-number of bits plural times to fill output elements of transmission and reception input circuits applied to n-bit transmission and reception block ciphering circuits respectively. CONSTITUTION:The output of a transmission input...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: SABATO AKIO
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PURPOSE:To reduce influences of error on a transmission line by using k-number of bits plural times to fill output elements of transmission and reception input circuits applied to n-bit transmission and reception block ciphering circuits respectively. CONSTITUTION:The output of a transmission input circuit 4 applied to a transmission m-bit block ciphering circuit 3 which executes a 3m-bit block cipher algorithm at a time (n) is denoted as X, and the output of a transmission output circuit 5 is denoted as Y. When a text 1 to be ciphered is denoted as p and an enciphered transmission signal is denoted as C, a k-bit pattern is used plural times to fill elements of X. In the reception side, namely, a decoding part, the k-bit pattern is used plural times in the same method as the transmission side to fill elements of the output of a reception input circuit applied to a reception m-bit block ciphering circuit 7 which executes an m-bit block cipher algorithm at the time (n).