SIGNAL DETECTING SYSTEM

PURPOSE:To improve the reliability of signal transmission/reception to a random error in comparison with majority decision discrimination in the unit of block by performing majority decision in the unit of bits. CONSTITUTION:When the input of received 5-block singal to shift registers SR1-SR5 is fin...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: KOMAGATA HITOSHI, WATABE TOSHIYUKI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To improve the reliability of signal transmission/reception to a random error in comparison with majority decision discrimination in the unit of block by performing majority decision in the unit of bits. CONSTITUTION:When the input of received 5-block singal to shift registers SR1-SR5 is finished in the order of reception block from an input terminal 11 in order, the signal is outputted to a ROM 8 from the head bit of each SR and data 12 corresponding to the stored address information 10 is outputted to a Dout9. The bit of the Dout is the result of discrimination of majority decision at each 5 bits. For example, if the 1st bit of the register SR2 is 0 in error, the address information is (10111) and 1 is outputted as the D0 corresponding thereto. Then the address information of the 2nd bit the (00100) and 0 is outputted as the result of discrimination. Through the operations by five times, 3/5 bit majority decision is finished for 5-block transmission and (10101) outputted from a ROM output terminal is the result of discrimination.