SEMICONDUCTOR INTEGRATED DEVICE AND MANUFACTURE THEREOF

PURPOSE:To obtain the titled device which prevents the increase in IDS leakage current at the sub-threshold region, by a method wherein the impurity concentration of the turret of a semiconductor substrate, surrounded by the element isolation part and having the element region at the flat part, at the part adjacent to the flat part of the slope on the side of determining the channel width is increased to a required limit. CONSTITUTION:A semiconductor substrate 20 is so constructed as to have a turret 22 surrounded by the element isolation region 21. This part 22 has a flat part 23 with the element region and slopes 25, 25 lying from the flat part 23 to the second flat part 24 forming the element isolation region, and a region 26 under the first flat part 23 is a channel layer 23. Impurity layers 27, 28 blocking the formation of an inversion layer are located under the slopes 25, 25 and the second flat part 24. The impurity layer 27 is arranged in adjacency to the first flat part 23 so as to prevent both sides 26a, 26b of the channel layer 26 hanging down along the slopes 25, 25 and to inhibit the inclination of increase in leakage current at gate voltages lower than the threshold voltage.