DATA PROCESSOR

PURPOSE:To improve the using efficiency of an input/output bus and also to increase the interruption processing speed, by providing multiple memory means to store the interruption request information given from an input/output controller as well as the validity flag of said request information. CONSTITUTION:When the interruption requests given from input/output controllers 3 and 4, both a requester channel number and an interruption level, i.e., the interruption request informations are set to a buffer register 11 to check whether an idle area exists or not at a memory means 13. If an idle area is detected, a reception enable answer is sent from an input/output bus control circuit 15. Then the interruption request information and its validity flag are stored successively at and after the lowest address of an idle area of the means 13. When the processing is over with a program which is under a run mode, the validity flags of the interruption request information stored in the means 13 are compared with each other. Then the programs are executed in the order of higher levels. Thus a negative answer is eliminated for an input/output bus 1. This improves the using efficiency of the bus 1 and also increases the interruption processing speed.