INSPECTION SYSTEM FOR MEMORY CIRCUIT
PURPOSE:To inspect an error correcting circuit simultaneously by inverting previously and writing an optional number N of data in a memory to be tested and checking coincidence between the output of a write data register and the output of a read data register. CONSTITUTION:If the memory circuit 1 to...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | PURPOSE:To inspect an error correcting circuit simultaneously by inverting previously and writing an optional number N of data in a memory to be tested and checking coincidence between the output of a write data register and the output of a read data register. CONSTITUTION:If the memory circuit 1 to be test has no error in read inspection, read data is invariably a correctable error in the error correcting circuit, so specific data bits which are inverted when written are corrected and sent out to the read data register 4, and a data coincidence inspecting circuit 5 compares then with the output 20 of the write data register 2 to decide that the memory circuit is normal. If a 1-bit error occurs in the memory circuit 1 to be tested, the read data is sent out as an incorrectable error to the read data register 4 without being corrected because its error bits including data bits which are inverted when written exceeds the number of correctable bits of the error correcting circuit 11 and the data coincidence inspecting circuit 5 detects two bits to point out the error bit. |
---|