CANCELLING SYSTEM OF MAIN MEMORY READOUT

PURPOSE:To reduce the number of steps of a microinstruction, by cancelling a main memory readout request by means of a precedently issued logical address in a cache cycle by an MBU when the data corresponding to the request are not required. CONSTITUTION:When a main memory readout request is made through a precedently issued logical address 52 from an execution unit 2 and it becomes clear that the readout data which is the subject of the readout request is not required and, as a result, the request is cancelled, the cycle cancelling microinstruction 55 of a main storage buffer unit (MBU) 4 generated at a control storage control unit (RCU) 1 is sent to the MBU4 at a prescribed timing. Then a command 53 sent from an address converting unit (ATU) 3 to the MBU4 is cancelled. Therefore, the command signal corresponding to the request is stopped at the timing corresponding to the cache cycle at the MBU4.