PULSE GENERATOR

PURPOSE:To obtain plural sets of output pulses without complicating the constitution by using a memory circuit in place of a counter deciding a pulse width and a pulse interval, setting the memory circuit so that each bit corresponds to each output pulse and scanning an address corresponding to a time axis of the memory circuit in a prescribed time. CONSTITUTION:In an address switch 19, the content of an address counter 18 inputted to a terminal B is outputted from a terminal Q to make address designation for a memory circuit 24. In writing information to the circuit 24, an operation control circuit 1 transmits information 3 to a data register 16 generated from a gate circuit 22 by using a Q output of an FF21 and an inverted reference clock 2b and the said information is written in the circuit 24. Each count of the address counter is fed to the circuit 24 through the switch 19 and the address is scanned sequentially at each cycle of a clock 2a. An output of the circuit 24 is fed to output pulse generating FF25-1-25-n. When one output of the FF25 goes to H, an output of an output effective pulse detection circuit 26 goes to H, and an output of a gate circuit 28 is a write pulse to the circuit 24.