CONTROL SYSTEM FOR CACHE MEMORY DEVICE

PURPOSE:To attain a report on the error detection to a memory access requester by replacing the data with a prescribed pattern and storing this pattern to a main memory in case a correction unable error is detected with the read data on a cache memory. CONSTITUTION:An error is detected by an error detecting circuit 114 for cache memory data when the data on a cache memory 113 is swapped out to a main memory 101. If this error is uncorrectable, a correction unable flag 119 is set. At the same time, an error discriminating code generating circuit produces a discriminating code that is not coincident with an error correction code. This code is stored to the memory 101 via a main memory store register 118.