SUBMOUNT FOR OPTICAL SEMICONDUCTOR ELEMENT

PURPOSE:To obtain the submount which withstands high temperature and high humidity by a method wherein the barrier layer to be provided on a wiring layer is constituted by Pt. CONSTITUTION:A wiring layer 41 is formed by performing a vacuum-deposition of Au layer 37, a Ti layer 38 and a Pt barrier ma...

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Bibliographische Detailangaben
Hauptverfasser: MIZUISHI KENICHI, CHIBA KATSUAKI, SAITOU KATSUTOSHI, TOKUDA MASAHIDE, KOBAYASHI MASAMICHI, IMAI KUNINORI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To obtain the submount which withstands high temperature and high humidity by a method wherein the barrier layer to be provided on a wiring layer is constituted by Pt. CONSTITUTION:A wiring layer 41 is formed by performing a vacuum-deposition of Au layer 37, a Ti layer 38 and a Pt barrier main body layer 30 are successively vapor-deposited, and a barrier layer 41 is formed. Then, a solder layer- shaped window is provided on a resist layer 43. Subsequently, Pb-Sn solder 44 is vapor-deposited on the surface of the resist layer 43 in the state wherein a resist film is coated. Then, a sample is soaked in an organic solvent in which a photoresist film will be dissolved, supersonic vibrations are applied to the solvent, the resist film is removed by dissolution, and a solder layer 52 is selectively formed. Lastly, a heat conductive SiC ceramic substrate 31 is cut in accordance with the patterning pitc of the solder layer, and a submount 50 is manufacture. Then, after a semiconductor lase chip 53 has been die-conded on the solder layer 52, the submount is soldered on a heat dissipating member 56. Then, an Au wire 55 is supersonic die-bonded on the upper electrode 54. Also, an Au wire 57 is supersonic die-bonded on a barrier 42, and a chip lower electrode is connected to the outside part.