MEMORY ACCESS SYSTEM

PURPOSE:To execute efficiently a memory access of a system in which plural devices execute an access to a main memory through a common bus, by providing a storage element having a nibble mode, on the main memory, and executing a high speed access by the nibble mode only with regard to a device which requires a high speed access. CONSTITUTION:In figure, 2 is a device which requires a high speed access and to which an access can be executed in a nibble mode, and 4 and 5 are nibble mode impossible devices which require no high speed access. 10 of a main memory 1 is a memory control part, and 11 is a storage element having the nibble mode. An access request to the main memory 1 from the devices 2, 4 and 5 is received by a bus request concurrence preventing circuit 6, and a contention of a request of a common bus 3 is prevented. The device 2 sends a nibble mode control signal to the main memory 1 through a nibble mode control bus 31 of the common bus 3, and can make the nibble mode effective, but the devices 4, 5 do not have this interface, cannot make the nibble mode of the main memory 1 effective, and execute a regular access.