MOS STATIC RAM

PURPOSE:To attain high speed operation and low power consumption by providing a variable load means controlled so as to increase the impedance at write in comparison with at read or chip non-selecting state. CONSTITUTION:A write circuit WA controls the operation with a control signal phiw and outputs a complementary data signal corresponding to an input data fed to a data input terminal Din in the operating state to common complementary lines CD, CD'. The write circuit WA brings a couple of output terminals to a high impedance state or a floating state in the non-operating state. At write, a high level and a low level are fed to the selected complementary data line from the write circuit WA, and the low level on the data line is brought a lower potential by increasing the impedance of a load circuit so as to speed up the write. A reactive current is annihilated and the lower power consumption is attained.