DIGITAL CONVERGENCE DEVICE
PURPOSE:To apply convergence correction with high accuracy by providing a cross hatch pattern generating circuit forming a longitudinal line at both left/ right ends of screen in addition to longitudinal and lateral lines of equal interval and forming a lateral line at both upper/lower ends of the s...
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creator | OOSAWA MICHITAKA OOKUBO SHIGEYOSHI FUNADA ETSUO |
description | PURPOSE:To apply convergence correction with high accuracy by providing a cross hatch pattern generating circuit forming a longitudinal line at both left/ right ends of screen in addition to longitudinal and lateral lines of equal interval and forming a lateral line at both upper/lower ends of the screen so as to extrapolate a correction amount to an adjusting point at the outside of the screen. CONSTITUTION:A PLL circuit 1 forms an fCLK1 being a frequency N-times fH and a frequency fCLK2 being a frequency M times from a clock signal obtained through MXN multiple of a horizontal deflection frequency (f). A counter 17 counts the fCLK2 of the longitudinal line appearing at both the left/right ends of the screen and a decoder 18 decodes the position at both left/right ends of the screen. The output and the fCLK1 are ORed and a longitudinal line signal of the cross hatch pattern having the longitudinal line at both the left/right ends of the screen is formed through a monostable multivibrator 12. The lateral line of equal interval is generated by frequency-dividing the horizontal deflection frequency fH by a frequency divider 13. The counter 21 counts the fH from the lateral line of both upper/lower screen, and a decoder 22 decodes the position at both ends of upper/lower screen. The signals are ORed by OR circuits 14, 20 and a video output syntheizing the marker signal and the cross hatch pattern signal is obtained by a synthesis circuit 15. |
format | Patent |
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CONSTITUTION:A PLL circuit 1 forms an fCLK1 being a frequency N-times fH and a frequency fCLK2 being a frequency M times from a clock signal obtained through MXN multiple of a horizontal deflection frequency (f). A counter 17 counts the fCLK2 of the longitudinal line appearing at both the left/right ends of the screen and a decoder 18 decodes the position at both left/right ends of the screen. The output and the fCLK1 are ORed and a longitudinal line signal of the cross hatch pattern having the longitudinal line at both the left/right ends of the screen is formed through a monostable multivibrator 12. The lateral line of equal interval is generated by frequency-dividing the horizontal deflection frequency fH by a frequency divider 13. The counter 21 counts the fH from the lateral line of both upper/lower screen, and a decoder 22 decodes the position at both ends of upper/lower screen. The signals are ORed by OR circuits 14, 20 and a video output syntheizing the marker signal and the cross hatch pattern signal is obtained by a synthesis circuit 15.</description><language>eng</language><subject>ADVERTISING ; ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION ; CRYPTOGRAPHY ; DISPLAY ; EDUCATION ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; PHYSICS ; PICTORIAL COMMUNICATION, e.g. TELEVISION ; SEALS</subject><creationdate>1985</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19850920&DB=EPODOC&CC=JP&NR=S60185482A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19850920&DB=EPODOC&CC=JP&NR=S60185482A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>OOSAWA MICHITAKA</creatorcontrib><creatorcontrib>OOKUBO SHIGEYOSHI</creatorcontrib><creatorcontrib>FUNADA ETSUO</creatorcontrib><title>DIGITAL CONVERGENCE DEVICE</title><description>PURPOSE:To apply convergence correction with high accuracy by providing a cross hatch pattern generating circuit forming a longitudinal line at both left/ right ends of screen in addition to longitudinal and lateral lines of equal interval and forming a lateral line at both upper/lower ends of the screen so as to extrapolate a correction amount to an adjusting point at the outside of the screen. CONSTITUTION:A PLL circuit 1 forms an fCLK1 being a frequency N-times fH and a frequency fCLK2 being a frequency M times from a clock signal obtained through MXN multiple of a horizontal deflection frequency (f). A counter 17 counts the fCLK2 of the longitudinal line appearing at both the left/right ends of the screen and a decoder 18 decodes the position at both left/right ends of the screen. The output and the fCLK1 are ORed and a longitudinal line signal of the cross hatch pattern having the longitudinal line at both the left/right ends of the screen is formed through a monostable multivibrator 12. The lateral line of equal interval is generated by frequency-dividing the horizontal deflection frequency fH by a frequency divider 13. The counter 21 counts the fH from the lateral line of both upper/lower screen, and a decoder 22 decodes the position at both ends of upper/lower screen. The signals are ORed by OR circuits 14, 20 and a video output syntheizing the marker signal and the cross hatch pattern signal is obtained by a synthesis circuit 15.</description><subject>ADVERTISING</subject><subject>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</subject><subject>CRYPTOGRAPHY</subject><subject>DISPLAY</subject><subject>EDUCATION</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>PICTORIAL COMMUNICATION, e.g. TELEVISION</subject><subject>SEALS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1985</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJBy8XT3DHH0UXD29wtzDXJ39XN2VXBxDfN0duVhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfFeAcFmBoYWpiYWRo7GxKgBADB0IHo</recordid><startdate>19850920</startdate><enddate>19850920</enddate><creator>OOSAWA MICHITAKA</creator><creator>OOKUBO SHIGEYOSHI</creator><creator>FUNADA ETSUO</creator><scope>EVB</scope></search><sort><creationdate>19850920</creationdate><title>DIGITAL CONVERGENCE DEVICE</title><author>OOSAWA MICHITAKA ; OOKUBO SHIGEYOSHI ; FUNADA ETSUO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPS60185482A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1985</creationdate><topic>ADVERTISING</topic><topic>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</topic><topic>CRYPTOGRAPHY</topic><topic>DISPLAY</topic><topic>EDUCATION</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>PICTORIAL COMMUNICATION, e.g. TELEVISION</topic><topic>SEALS</topic><toplevel>online_resources</toplevel><creatorcontrib>OOSAWA MICHITAKA</creatorcontrib><creatorcontrib>OOKUBO SHIGEYOSHI</creatorcontrib><creatorcontrib>FUNADA ETSUO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>OOSAWA MICHITAKA</au><au>OOKUBO SHIGEYOSHI</au><au>FUNADA ETSUO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>DIGITAL CONVERGENCE DEVICE</title><date>1985-09-20</date><risdate>1985</risdate><abstract>PURPOSE:To apply convergence correction with high accuracy by providing a cross hatch pattern generating circuit forming a longitudinal line at both left/ right ends of screen in addition to longitudinal and lateral lines of equal interval and forming a lateral line at both upper/lower ends of the screen so as to extrapolate a correction amount to an adjusting point at the outside of the screen. CONSTITUTION:A PLL circuit 1 forms an fCLK1 being a frequency N-times fH and a frequency fCLK2 being a frequency M times from a clock signal obtained through MXN multiple of a horizontal deflection frequency (f). A counter 17 counts the fCLK2 of the longitudinal line appearing at both the left/right ends of the screen and a decoder 18 decodes the position at both left/right ends of the screen. The output and the fCLK1 are ORed and a longitudinal line signal of the cross hatch pattern having the longitudinal line at both the left/right ends of the screen is formed through a monostable multivibrator 12. The lateral line of equal interval is generated by frequency-dividing the horizontal deflection frequency fH by a frequency divider 13. The counter 21 counts the fH from the lateral line of both upper/lower screen, and a decoder 22 decodes the position at both ends of upper/lower screen. The signals are ORed by OR circuits 14, 20 and a video output syntheizing the marker signal and the cross hatch pattern signal is obtained by a synthesis circuit 15.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | ADVERTISING ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION CRYPTOGRAPHY DISPLAY EDUCATION ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY PHYSICS PICTORIAL COMMUNICATION, e.g. TELEVISION SEALS |
title | DIGITAL CONVERGENCE DEVICE |
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