DIGITAL CONVERGENCE DEVICE
PURPOSE:To apply convergence correction with high accuracy by providing a cross hatch pattern generating circuit forming a longitudinal line at both left/ right ends of screen in addition to longitudinal and lateral lines of equal interval and forming a lateral line at both upper/lower ends of the s...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | PURPOSE:To apply convergence correction with high accuracy by providing a cross hatch pattern generating circuit forming a longitudinal line at both left/ right ends of screen in addition to longitudinal and lateral lines of equal interval and forming a lateral line at both upper/lower ends of the screen so as to extrapolate a correction amount to an adjusting point at the outside of the screen. CONSTITUTION:A PLL circuit 1 forms an fCLK1 being a frequency N-times fH and a frequency fCLK2 being a frequency M times from a clock signal obtained through MXN multiple of a horizontal deflection frequency (f). A counter 17 counts the fCLK2 of the longitudinal line appearing at both the left/right ends of the screen and a decoder 18 decodes the position at both left/right ends of the screen. The output and the fCLK1 are ORed and a longitudinal line signal of the cross hatch pattern having the longitudinal line at both the left/right ends of the screen is formed through a monostable multivibrator 12. The lateral line of equal interval is generated by frequency-dividing the horizontal deflection frequency fH by a frequency divider 13. The counter 21 counts the fH from the lateral line of both upper/lower screen, and a decoder 22 decodes the position at both ends of upper/lower screen. The signals are ORed by OR circuits 14, 20 and a video output syntheizing the marker signal and the cross hatch pattern signal is obtained by a synthesis circuit 15. |
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